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Cobham processor tech powers SSTL's VESTA-1 nanosatellite

Posted 15 April 2019 · Add Comment

Cobham has announced that its LEON3FT processor technology has successfully been used on the VESTA-1 nanosatellite developed and operated by Surrey Satellite Technology Ltd (SSTL).



SSTL has recently confirmed the successful commissioning and operation of VESTA-1, a 3U nanosatellite technology demonstration mission that will test a new two-way VHF Data Exchange System (VDES) payload developed by Honeywell for the ExactEARTH advanced maritime satellite constellation.

The satellite was launched into a 575 km sun-synchronous orbit as part of Spaceflight’s SSO-A SmallSat Express Mission atop a SpaceX Falcon 9 rocket from Vandenberg Air Force Base on December 3, 2018.

“Cobham congratulates the SSTL team for successfully launching and commissioning the VESTA-1 spacecraft. We are very proud that the fault-tolerant LEON3FT processor technology is used in the flexible nanosatellite satellite platform, bringing reliability and extensive flight heritage from traditional space mission to this new breed of miniaturised spacecraft”, said Sandi Habinc, General Manager, Cobham Gaisler. "Our processor Intellectual Property core is the key element in the single-event upset (SEU) tolerant on-board computer of the VESTA-1 spacecraft. Also our LEON/SPARC software port is deployed with the VxWorks operating system as part of the flight software. Our processor offering thus covers both the hardware and the software, allowing our users to focus on their application development.”

“The LEON3FT processor was selected for the VESTA-1 nanosatellite On-Board Computer (OBC) and SGR-Ligo GNSS receiver as it met the requirements for a low power, FPGA embedded SEU tolerant processing platform. Naturally for nanosatellite applications, power consumption and board area are important criteria. Embedding the LEON3FT processor with custom Attitude Determination and Control System (ADCS), platform Controller Area Network (CAN) controller and IP communications protocol logic, et al, into a single flash-based FPGA resulted in a high reliability COTS nanosatellite OBC that consumes less than 1 Watt”, said David Cooke, Principal Engineer, SSTL. “With a bespoke Board Support Package (BSP) for the nanosatellite OBC, we were able to re-deploy our heritage OBC flight software onto the LEON3FT platform in a very short timeframe. The result is an SEU tolerant, low power nanosatellite OBC running SSTL proven CONOPS software.”

The development of VESTA was co-funded by the UK Space Agency through its National Space Technology Programme (NSTP) which stimulates the growth and development of the UK space sector through investing in technology development. The project was led by Honeywell.


 

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